R10. II B. Tech I Semester, Supplementary Examinations, May


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1 SET a) Convert the following decimal numbers into an equivalent binary numbers. i) ii) iii) 167 iv) b) Add the following numbers using 2 s complement method. i) 48 and +31 ii) 1101 and 1110 iii) 64 and 13 iv) 63 and a) What is meant by minterm and maxterm? Write the procedure to obtain the canonical SOP form of a given logic functions. b) Express the following functions in sum of minterms and product of maxterms. i) (xy+z) (y+xz) ii) B D+A D+BD 3. a) Simplify Y = m(3,6,7,8,10,12,14,17,19,20,21,24,25,27,28) using Kmap method. b) Obtain i) minimal SOP and ii) minimal POS expressions for the following function. F(A,B,C,D)= m(0,1,1,5,8,9,10) 4. a) Present the steps involved in the design procedure of a combinational circuit. Consider a suitable example. b) Design, draw and explain the operation of ripple adder. 5. a) Implement the following Boolean function using 8 1 multiplexer. F(A,B,C,D)= m(2,5,8,9,10,14,15) b) What is a decoder? Construct a 4 16 decoder with two 3 8 decoders. Draw and explain the relevant logic diagram. 6. a) Using PLA logic, implement a BCD to excess3 code converter. Draw and explain its truth table and logic diagram. b) Explain in brief, about logic construction of 32x4 ROM. Draw and explain the relevant logic diagram. 7. a) Explain the sequential logic circuits and clocked sequential logic circuits with relevant examples. b) Design SR latch with universal logic gates. Draw and explain the logic diagrams. 8. a) Discuss about synchronous and ripple counters. Compare their merits and demerits. b) What do you mean by universal shift register? Draw and explain its circuit diagram and operation. 1 of 1
2 SET a) Convert the following hexadecimal numbers into an equivalent binary numbers. i) 49 ii) 324 iii) ABC iv) FB17 b) Subtract the following decimal numbers using the 9 s complement method. i) ii) iii) iv) a) What are universal gates? Realize AND, OR, NOT, XOR gates using universal gates. b) Obtain the canonical SOP form of the following functions. i) Y(A,B) = A+B ii) Y(A,B,C,D) = AB+ACD 3. a) Simplify the expression Y= (7, 9, 10, 11, 12, 13, 14, 15) using the kmap method. b) Simplify the expression Y= m 1 + m 5 +m 10 +m 11 +m 12 +m 13 +m 15 using the kmap method. 4. a) Draw the block schematic and truth table for fullsubtractor. Explain the design approach for fullsubtractor with two halfsubtractors. Draw the relevant logic diagram with necessary expressions. (10M) b) Draw and explain the operation of look ahead carry adder. (6M) 5. a) Implement the given Boolean function using 4 1 multiplexer. F(A,B,C,D)= m(2,5,8,9,10,14,15) b) Design, draw and explain a 4  input priority encoder. 6. a) Tabulate the PLA programming table for the following Boolean functions. A(x,y,z)= m(0,2,3,7) B(x,y,z)= m(1,3,4,6) C(x,y,z)= m(1,4) Draw and explain the relevant logic diagram. b) Design, draw and explain ROM using 32 8 ROM. 1 of 2
3 SET A sequential circuit with two D flip flops A and B, two inputs x and y and one output z is specified by the following next state and output equations. i) A(t+1)= x y + xa ii) B(t+1)= x B + xa Z=B a) Draw the logic diagram. b) List the state table for the sequential circuit. c) Draw the state diagram. (16M) 8. a) Design, draw and explain a synchronous MOD12 downcounter using jk flipflop. b) Design, draw and explain a 4bit ring counter using D flip flops with relevant timing diagrams. 2 of 2
4 SET a) Convert the following. i) [643] 10 to excess3 code ii) [96.42] 10 to BCD code iii) [110101] G to binary code iv)[ ] 2 to gray code b) Subtract the following decimal numbers using the 9,s complement method. i) ii) iii) 94 iv) a) State the Demorgan s theorems and simplify the expression. A B + ABC + A( B + AB) b) Obtain the canonical SOP form of the following functions. i) Y ( A, B, C) = ( A + B)( B + C)( A + C) ii) Y = A + BC 3. a) Simplify the expression Y= m(7,9,10,11,12,13,14,15) using the kmap method. b) Simplify the following Boolean function F(A,B,C,D)= m(1,3,7,11,15) + d(0,2,5) 4. a) Draw the schematic diagram and truth table for full adder. Explain the design approach for full adder using universal gates. Draw the relevant logic diagrams with necessary expressions. b) Draw and explain the operation of 2 s complement addersubtractor. (10M+6M) 5. a) Implement the Boolean function using 8 1 multiplexer F(A,B,C,D)= m(0,2,4,6,8,10,12,14) b) Design BCD to Gray code converter and realize the same using logic gates. 6. a) Derive the PLA programming table for the combinational circuit that squares a 3bit number. Draw the relevant logic diagram. b) A ROM chip of 4,096 8 bits has two chip select inputs and operates from a 5volt power supply. How many pins are needed for the integrated circuit package? Draw and explain the relevant block diagram. 7. a) Realize DFF and TFF using JKFF. Draw the logic diagrams with their truth tables. b) Deduce the design procedure for sequential logic circuits and give the classification of sequential logic circuits. 8. a) Design, draw and explain the 4bit universal shift register. b) Describe the parallelin serialout shift register with logic diagram. Give the design considerations. 1 of 1
5 SET a) Convert the following numbers. i) (53) 10 = ( ) 2 ii) (231) 8 = ( ) 10 iii) ( ) 2 = ( ) 8 iv) (4D.56) 16 = ( ) 2 b) Perform the following operations using 1 s complement method and compare this method with the direct method. i) (1010) 2 (1111) 2 ii) (1010) 2 (1000)2 2. a) What are the properties of Boolean algebra? State and prove the same. b) Given the Boolean function. F = xy z + XY z + W xy + w X y + wxy i) Drawn the truth table and logic diagram ii) Simplify the function to a minimum number of literals using Boolean algebra. 3. Obtain the minimal SOP expression for the switching function using kmap. Y= m(1,5,7,13,14,15,17,18,21,22,25,29) + d(6,9,19,23,30) Draw and explain the logic diagram (16M) 4. a) Draw the schematic diagram and truth table for half adder. Explain the design approach for half adder using universal gates. Draw the logic diagrams with relevant expressions. b) Design, draw and explain a 4bit binary carry look ahead adder. 5. a) Implement the Boolean function using 8 1 multiplexer F(A,B,C,D)= m(0,1,3,4,8,9,15) b) Construct 4 to 16 line decoder with five 2to4 line decoders with enable input. Draw and explain the logic diagram. 6. a) For 3input, 4output truth table of a combination logic circuit, derive the PAL programming table and draw the logic diagram. Inputs Output x y z A B C D b) Construct ROM using 32 8 ROM chips. Draw and explain the logic diagram. 1 of 2
6 SET a) What is meant by edge triggered? Differentiate SRFF and JKFF with their functional operation and excitation tables. 8M b) Draw and explain the circuit diagram of positive edge triggered JK flipflop using NOR gates with its truth table. How race around conditions are eliminated? 8M 8. a) Design, draw and explain a modulo 12 up synchronous counter using T flip flops. 8M b) Draw and explain the logic diagram for a 4bit binary ripple down counter using positive edge triggered flipflops. 8M 2 of 2
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